1. Field of the Invention
This invention relates to a reflection-type exposure mask and a method for manufacturing the same and a method for manufacturing a semiconductor device using this exposure mask.
2. Background Art
In the manufacturing process for semiconductor devices, the demands for the miniaturization of photolithography are increased with the downscaling of semiconductor devices. The device design rule has already been reduced to 24 nm (nanometers). Also with regard to light exposure for lithography, conventional exposure using ArF excimer laser light with a wavelength of 193 nm is being replaced by exposure using EUV (extreme ultraviolet) light with a wavelength of 13.5 nm.
Most substances have high optical absorption for EUV light. Hence, the EUV exposure mask (EUV mask) is a reflection-type mask unlike the conventional transmission-type masks. For instance, JP-A 2007-273651 (Kokai) discloses a technique for forming a light reflecting film made of a multilayer film by alternately laminating molybdenum (Mo) layers and silicon (Si) layers on a glass substrate, and forming a pattern thereon from a light absorber primarily composed of tantalum (Ta).
In addition, a halftone (HT) type is becoming the mainstream EUV mask in recent years. In conventional EUV masks, which are not of the HT type, the light absorber has a thickness of approximately 90 nm, and its EUV reflectance is nearly zero. In contrast, in HT-type EUV masks, the light absorber is as thin as approximately 50 nm, and its EUV reflectance is 2-3%. Furthermore, EUV light transmitted in the light absorber and reflected by the light reflecting film is approximately 180 degrees out of phase with respect to EUV light directly reflected by the light reflecting film without being transmitted in the light absorber. This increases contrast on the wafer and improves edge roughness of the exposed and developed resist pattern.
However, in a HT-type EUV mask, EUV light incident on the light absorber is also reflected. Hence, when a certain exposure region of a wafer is light-exposed, the EUV light undesirably leaks into an exposure region adjacent to this exposure region. In this context, a technique for preventing this leakage of EUV light has been developed, in which the light reflecting film is removed in a frame-shaped region surrounding a center region of the EUV mask where the light absorber is patterned. In this frame-shaped region from which the light reflecting film is removed, the glass substrate is exposed and scarcely reflects the incident EUV light. Hence, leakage of EUV light into the adjacent exposure region can be prevented.
On the other hand, defect inspection for an EUV mask is performed by irradiation with an electron beam from a scanning electron microscope (SEM) or the like. During the inspection, a conductive pin is brought into contact with a peripheral region of the EUV mask to release irradiated electrons. This can avoid charge-up of the EUV mask, and a clear image can be obtained for the inspection.
However, if the light reflecting film or the like is removed from the EUV mask in a frame-shaped region, the portion of the light reflecting film and the light absorber located inside the frame-shaped region is electrically insulated from the portion located outside the frame-shaped region. The pattern to be inspected is formed in the portion inside the frame-shaped region, whereas the conductive pin is brought into contact with the portion outside the frame-shaped region. Hence, the patterned portion is placed in an electrically floating state. If the patterned portion is irradiated with an electron beam for defect inspection, charge-up causes image distortion and hinders accurate defect inspection. Hence, some defects are missed in defect inspection, and an EUV mask containing these defects is erroneously determined to be non-defective. Consequently, in the manufacturing stage of a semiconductor device, these defects are transferred to the semiconductor device and decrease the manufacturing yield of the semiconductor device.